##############################################################################
##
## Copyright (c) 2006 Xilinx, Inc. All Rights Reserved.
##
## xps_mch_emc_v2_1_0.tcl
##
##############################################################################

## @BEGIN_CHANGELOG EDK_J
##
## - initial 1.00a version
##
## @END_CHANGELOG
##


#***--------------------------------***------------------------------------***
#
#                            IPLEVEL_DRC_PROC
#
#***--------------------------------***------------------------------------***

#
# check C_MAX_MEM_WIDTH
# C_MAX_MEM_WIDTH = max(C_MEMx_WIDTH)
#
proc check_iplevel_settings {mhsinst} {

    set mhs_handle   [xget_hw_parent_handle $mhsinst]
    xload_hw_library emc_common_v2_01_c

    hw_emc_common_v2_01_c::check_max_mem_width $mhsinst

}
